6 commits

Author	SHA1	Message	Date
zegervdv	6731bcbf7b	Add locals for verilog	2020-11-21 14:43:08 +01:00
zegervdv	6cc1c28f68	Add missing verilog keywords	2020-11-21 14:43:08 +01:00
zegervdv	d59b4810a6	Improve highlighting of port declarations in verilog	2020-11-21 14:43:08 +01:00
zegervdv	7fa67b490f	Improve highlighting for generate blocks	2020-11-16 18:43:00 +01:00
zegervdv	2fd50be1d6	Add folds for begin/end blocks, functions and tasks	2020-11-16 18:43:00 +01:00
Zeger Van de Vannet	392c4b978b	Add verilog/systemverilog queries	2020-10-20 16:33:13 +02:00